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take into account Raptor Lake

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Signed-off-by: SergeySlice <sergey.slice@gmail.com>
This commit is contained in:
SergeySlice 2022-11-23 22:18:52 +03:00
parent 89c685e15f
commit edd275d82c
5 changed files with 11 additions and 4 deletions
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2
Include/IndustryStandard/ProcessorInfo.h
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@ -200,7 +200,7 @@ enum {
#define CPU_MODEL_TIGERLAKE_D 0x8D /* 11h generation Tiger Lake */
#define CPU_MODEL_ALDERLAKE 0x97 /* 12h generation Alder Lake */
#define CPU_MODEL_ROCKETLAKE 0xA7 /* 11h Rocket Lake */
#define CPU_MODEL_RAPTORLAKE 0xB7 /* 13h Raptor Lake */
#define CPU_SOCKET_UNKNOWN 0x02
#define CPU_SOCKET_PGA478 0x0F

2
MdePkg/Include/Protocol/MpService.h
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@ -79,7 +79,7 @@ typedef struct _EFI_MP_SERVICES_PROTOCOL EFI_MP_SERVICES_PROTOCOL;
#define PROCESSOR_HEALTH_STATUS_BIT 0x00000004
///
/// Structure that describes the pyhiscal location of a logical CPU.
/// Structure that describes the physical location of a logical CPU.
///
typedef struct {
///

6
rEFIt_UEFI/Platform/StateGenerator.cpp
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@ -277,7 +277,8 @@ SSDT_TABLE *generate_pss_ssdt(UINTN Number)
case CPU_MODEL_TIGERLAKE_D:
case CPU_MODEL_ALDERLAKE:
case CPU_MODEL_ROCKETLAKE:
{
case CPU_MODEL_RAPTORLAKE:
{
maximum.Control.Control = RShiftU64(AsmReadMsr64(MSR_PLATFORM_INFO), 8) & 0xff;
if (gSettings.ACPI.SSDT.MaxMultiplier) {
DBG("Using custom MaxMultiplier %d instead of automatic %d\n",
@ -346,7 +347,8 @@ SSDT_TABLE *generate_pss_ssdt(UINTN Number)
(gCPUStructure.Model == CPU_MODEL_TIGERLAKE_C) ||
(gCPUStructure.Model == CPU_MODEL_TIGERLAKE_D) ||
(gCPUStructure.Model == CPU_MODEL_ROCKETLAKE) ||
(gCPUStructure.Model == CPU_MODEL_ALDERLAKE) ||
(gCPUStructure.Model == CPU_MODEL_ALDERLAKE) ||
(gCPUStructure.Model == CPU_MODEL_RAPTORLAKE) ||
(gCPUStructure.Model == CPU_MODEL_COMETLAKE_S) ||
(gCPUStructure.Model == CPU_MODEL_COMETLAKE_Y) ||
(gCPUStructure.Model == CPU_MODEL_COMETLAKE_U)) {

4
rEFIt_UEFI/Platform/cpu.cpp
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@ -328,6 +328,7 @@ void GetCPUProperties (void)
case CPU_MODEL_TIGERLAKE_D:
case CPU_MODEL_ALDERLAKE:
case CPU_MODEL_ROCKETLAKE:
case CPU_MODEL_RAPTORLAKE:
msr = AsmReadMsr64(MSR_CORE_THREAD_COUNT); //0x35
DBG("MSR 0x35 %16llX\n", msr);
gCPUStructure.Cores = (UINT8)bitfield((UINT32)msr, 31, 16);
@ -523,6 +524,7 @@ void GetCPUProperties (void)
case CPU_MODEL_TIGERLAKE_D:
case CPU_MODEL_ALDERLAKE:
case CPU_MODEL_ROCKETLAKE:
case CPU_MODEL_RAPTORLAKE:
gCPUStructure.TSCFrequency = MultU64x32(gCPUStructure.CurrentSpeed, Mega); //MHz -> Hz
gCPUStructure.CPUFrequency = gCPUStructure.TSCFrequency;
@ -1402,6 +1404,7 @@ UINT16 GetAdvancedCpuType()
case CPU_MODEL_TIGERLAKE_D:
case CPU_MODEL_ALDERLAKE:
case CPU_MODEL_ROCKETLAKE:
case CPU_MODEL_RAPTORLAKE:
if ( gCPUStructure.BrandString.contains("Core(TM) i3") )
return 0x905; // Core i3 - Apple doesn't use it
if ( gCPUStructure.BrandString.contains("Core(TM) i5-1") )
@ -1651,6 +1654,7 @@ MacModel GetDefaultModel()
break;
case CPU_MODEL_ALDERLAKE:
case CPU_MODEL_COMETLAKE_S:
case CPU_MODEL_RAPTORLAKE:
DefaultType = MacPro71;
break;
default:

1
rEFIt_UEFI/Platform/cpu.h
View File

@ -78,6 +78,7 @@
#define CPU_MODEL_COMETLAKE_Y 0xA5 /* 10h Comet Lake */
#define CPU_MODEL_COMETLAKE_U 0xA6 /* 10h Comet Lake */
#define CPU_MODEL_ROCKETLAKE 0xA7 /* 11h Rocket Lake */
#define CPU_MODEL_RAPTORLAKE 0xB7 /* 11h Raptor Lake */
#define CPU_VENDOR_INTEL 0x756E6547
#define CPU_VENDOR_AMD 0x68747541