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SPI schema now uses typed_schema with type
key (#6353)
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parent
51ab15c40e
commit
782d662c20
@ -32,7 +32,10 @@ from esphome.const import (
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CONF_ALLOW_OTHER_USES,
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CONF_ALLOW_OTHER_USES,
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CONF_DATA_PINS,
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CONF_DATA_PINS,
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)
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)
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from esphome.core import coroutine_with_priority, CORE
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from esphome.core import (
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coroutine_with_priority,
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CORE,
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)
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CODEOWNERS = ["@esphome/core", "@clydebarrow"]
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CODEOWNERS = ["@esphome/core", "@clydebarrow"]
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spi_ns = cg.esphome_ns.namespace("spi")
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spi_ns = cg.esphome_ns.namespace("spi")
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@ -73,6 +76,8 @@ CONF_SPI_MODE = "spi_mode"
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CONF_FORCE_SW = "force_sw"
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CONF_FORCE_SW = "force_sw"
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CONF_INTERFACE = "interface"
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CONF_INTERFACE = "interface"
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CONF_INTERFACE_INDEX = "interface_index"
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CONF_INTERFACE_INDEX = "interface_index"
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TYPE_SINGLE = "single"
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TYPE_QUAD = "quad"
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# RP2040 SPI pin assignments are complicated;
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# RP2040 SPI pin assignments are complicated;
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# refer to GPIO function select table in https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf
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# refer to GPIO function select table in https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf
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@ -297,18 +302,19 @@ SPI_QUAD_SCHEMA = cv.All(
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),
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),
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}
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}
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),
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),
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cv.only_on([PLATFORM_ESP32]),
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cv.only_with_esp_idf,
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cv.only_with_esp_idf,
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)
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)
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CONFIG_SCHEMA = cv.All(
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CONFIG_SCHEMA = cv.All(
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# Order is important. SPI_SCHEMA is the default.
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cv.ensure_list(
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cv.ensure_list(
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cv.Any(
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cv.typed_schema(
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SPI_SCHEMA,
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{
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SPI_QUAD_SCHEMA,
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TYPE_SINGLE: SPI_SCHEMA,
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msg="Standard SPI requires mosi_pin and/or miso_pin; quad SPI requires data_pins only."
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TYPE_QUAD: SPI_QUAD_SCHEMA,
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+ " A clock pin is always required",
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},
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),
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default_type=TYPE_SINGLE,
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)
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),
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),
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validate_spi_config,
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validate_spi_config,
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)
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)
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23
tests/components/spi/test.esp32-s3-idf.yaml
Normal file
23
tests/components/spi/test.esp32-s3-idf.yaml
Normal file
@ -0,0 +1,23 @@
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spi:
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- id: spi_id_1
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type: single
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clk_pin:
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number: GPIO7
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allow_other_uses: false
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mosi_pin: GPIO6
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interface: hardware
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- id: quad_spi
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type: quad
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clk_pin: 47
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interface: spi3
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data_pins:
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- number: 40
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allow_other_uses: false
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- 41
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- 42
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- 43
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- id: spi_id_3
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clk_pin: 8
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mosi_pin: 9
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interface: any
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@ -23,20 +23,12 @@ psram:
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spi:
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spi:
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- id: spi_id_1
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- id: spi_id_1
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type: single
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clk_pin:
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clk_pin:
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number: GPIO7
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number: GPIO7
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allow_other_uses: false
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allow_other_uses: false
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mosi_pin: GPIO6
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mosi_pin: GPIO6
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interface: any
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interface: hardware
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- id: quad_spi
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clk_pin: 47
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data_pins:
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- number: 40
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allow_other_uses: false
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- 41
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- 42
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- 43
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spi_device:
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spi_device:
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id: spidev
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id: spidev
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data_rate: 2MHz
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data_rate: 2MHz
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